Title
FPGA Implementation of a Prototype WDM On-Line Scheduler
Abstract
Message sequencing and channel assignment are two important aspects to consider in optimizing the performance of Wavelength Division Multiplexing (WDM) networks. A scheduling technique, Multiple-Messages-per-Node with Shortest Job First priority (MMN-SJF), has been proposed to tackle these two areas simultaneously and offers a globally optimizing approach to scheduling. In this paper, a reconfigurable testbed consisting of several interconnected FPGAs for analyzing such scheduling algorithms is introduced and in particular, a prototype scheduler is developed to investigate the implementation and hardware complexity associated with MMN-SJF. We find that the MMN-SJF scheduling technique can be implemented cost effectively and with only simple logic blocks.
Year
DOI
Venue
2000
10.1007/3-540-44614-1_82
FPL
Keywords
Field
DocType
message sequencing,fpga implementation,scheduling algorithm,channel assignment,wavelength division multiplexing,mmn-sjf scheduling technique,prototype wdm on-line scheduler,important aspect,shortest job first priority,optimizing approach,scheduling technique,hardware complexity,global optimization,shortest job first,cost effectiveness
Fixed-priority pre-emptive scheduling,Fair-share scheduling,Scheduling (computing),Computer science,Parallel computing,Two-level scheduling,Real-time computing,Shortest job next,Rate-monotonic scheduling,Dynamic priority scheduling,Round-robin scheduling,Distributed computing
Conference
ISBN
Citations 
PageRank 
3-540-67899-9
0
0.34
References 
Authors
1
3
Name
Order
Citations
PageRank
Winnie W. Cheng100.34
Steven J. E. Wilton21154130.09
Hamidzadeh Babak318424.99