Paper Info
Title
A novel method of constructing Quasi-Cyclic RS-LDPC codes for 10GBASE-T Ethernet.
Abstract
This paper presents a novel method of constructing of Quasi-Cyclic Reed-Solomon-based LDPC (QC-RS-LDPC) codes for the application of 10GBASE-T Ethernet. The proposed code construction method makes RS-LDPC codes to be quasi-cyclic codes without bit error rate performance degradation. Therefore, QC-RS-LDPC decoder using the proposed method can use Banyan network or QSN that are efficient switch networks for QC codes. For performance comparison, the switch networks have been implemented. The results show that the switch network using the proposed method requires less memory size than existing switch network like Benes network. Since the switch network optimized for QC codes reduces critical path delay, the clock speed of QC-RS-LDPC decoder can be improved. The proposed method is able to construct QC-RS-LDPC codes, which reduces hardware size and improves clock speed.
Year
DOI
Venue
2012
10.1109/ISCAS.2012.6271608
ISCAS
Keywords
DocType
ISSN
switch network,hardware,bit error rate,switches,decoding,vectors
Conference
0271-4302
ISBN
Citations 
PageRank 
978-1-4673-0218-0
0
0.34
References 
Authors
7
3
Name
Order
Citations
PageRank
Seong-In Hwang1172.05
Hanho Lee220540.92
Shin-il Lim3810.10