Name
Abstract | ||
|---|---|---|
Switch-level faults, as opposed to traditional gate-level faults, can more accurately model physical failures found in an integrated circuit. However, one problem with switch-level fault simulation is that of long simulation times. This paper addresses this problem by performing fast approximate switch-level fault simulation using transistor reverse level ordering, and a novel nine-valued switch-level extension to observability. The probability of propagation of a fault from an arbitrary line of the switch-level circuit to the primary output is shown to be a function of the average node fan-in and the line's distance to primary output. Using this probability, results show one order of magnitude of complexity speed-up as compared to traditional fault simulation techniques, while maintaining good accuracy. |
Year | DOI | Venue |
|---|---|---|
1996 | 10.1109/92.532034 | IEEE Trans. VLSI Syst. |
Keywords | Field | DocType |
fast approximate fault simulator,approximate switch-level fault simulation,arbitrary line,switch-level fault simulation,switch-level extension,traditional gate-level fault,long simulation time,switch-level fault,traditional fault simulation technique,switch-level circuit,primary output,probability,logic,observability,mathematical model,vhdl,integrated circuit,fx,switches,hardware description languages | Stuck-at fault,Observability,Fault coverage,Computer science,Real-time computing,Electronic engineering,VHDL,Fault Simulator,Fault model,Hardware description language,Fault indicator | Journal |
Volume | Issue | ISSN |
4 | 3 | 1063-8210 |
Citations | PageRank | References |
1 | 0.35 | 17 |
Authors | ||
2 | ||
Name | Order | Citations | PageRank |
|---|---|---|---|
| Christopher A. Ryan | 1 | 4 | 1.43 |
| joseph g tront | 2 | 149 | 24.97 |