Name
Abstract | ||
|---|---|---|
We describe the architecture of a structured ASIC fabric in which the logic and routing can be customized using three masks. A standard Cadence based design flow is employed, and using an active dynamic backlight controller as an example, performance is compared to that of an ASIC implementation in the same technology.
|
Year | DOI | Venue |
|---|---|---|
2010 | 10.1109/ASPDAC.2010.5419854 | ASP-DAC |
Keywords | Field | DocType |
design flow,asic implementation,standard cadence,active dynamic backlight controller,rapid prototyping,structured asic fabric,application specific integrated circuits,integrated circuit design,metals,logic gates | Rapid prototyping,Control theory,Logic gate,Computer science,Real-time computing,Electronic engineering,Backlight,Application-specific integrated circuit,Design flow,Integrated circuit design,Physical design,Embedded system | Conference |
ISSN | ISBN | Citations |
2153-6961 | 978-1-60558-837-7 | 1 |
PageRank | References | Authors |
0.35 | 1 | 9 |
Name | Order | Citations | PageRank |
|---|---|---|---|
| Steve C. L. Yuen | 1 | 49 | 9.26 |
| Yanqing Ai | 2 | 11 | 2.25 |
| Brian P.W. Chan | 3 | 11 | 1.52 |
| Thomas C. P. Chau | 4 | 53 | 6.81 |
| Sam M. H. Ho | 5 | 8 | 1.83 |
| Oscar K. L. Lau | 6 | 6 | 1.87 |
| Kong-pang Pun | 7 | 315 | 55.34 |
| Philip H. W. Leong | 8 | 106 | 12.97 |
| Oliver Chiu-sing Choy | 9 | 23 | 7.83 |