Paper Info
Title
Brief announcement: between all and nothing - versatile aborts in hardware transactional memory
Abstract
Hardware Transactional Memory (HTM) implementations are becoming available in commercial, off-the-shelf components. While generally comparable, some implementations deviate from the strict all-or-nothing property of pure Transactional Memory. We analyse these deviations and find that with small modifications, they can be used to accelerate and simplify both transactional and non-transactional programming constructs. At the heart of our extensions we enable access to the transaction's full register state in the abort handler in an existing HTM without extending the architectural register state. Access to the full register state enables applications in both transactional and non-transactional parallel programming: hybrid transactional memory; transactional escape actions; transactional suspend/resume; and alert-on-update.
Year
DOI
Venue
2013
10.1145/2486159.2486165
SPAA
Keywords
Field
DocType
non-transactional parallel programming,hardware transactional memory,existing htm,implementations deviate,transactional escape action,architectural register state,brief announcement,hybrid transactional memory,versatile aborts,non-transactional programming construct,full register state,pure transactional memory,computer architecture,synchronisation,transactional memory
Software transactional memory,Commitment ordering,Synchronization,Computer science,Parallel computing,Double compare-and-swap,Implementation,Transactional memory,Database transaction,Transactional leadership,Operating system,Distributed computing
Conference
Citations 
PageRank 
References 
1
0.35
7
Authors
4
Name
Order
Citations
PageRank
Stephan Diestelhorst11227.17
Martin Nowack2865.48
Michael Spear3799.97
Christof Fetzer42429172.89