Abstract | ||
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The Texas Instruments' TMS320C40 Digital Signal Processor's communication ports and their associated DMA channels have been modelled using Timed Petri Nets. The Petri Net implementation is discussed, and the performance of the communication ports/DMA channels are evaluated. Analysis of the simulation results indicate that the single DMA bus provides insufficient bandwidth to drive the communication ports at maximum speed. During split mode operation the requirement to exchange the bus token reduces the communication bandwidth. |
Year | DOI | Venue |
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1993 | 10.1007/3-540-56863-8_68 | Application and Theory of Petri Nets |
Keywords | Field | DocType |
timed petri nets,petri net,communication channels | Port (computer networking),Petri net,Digital signal processor,Computer science,Communication channel,Computer network,Stochastic Petri net,Communication bandwidth,Bandwidth (signal processing),Security token,Distributed computing | Conference |
ISBN | Citations | PageRank |
3-540-56863-8 | 1 | 0.50 |
References | Authors | |
3 | 2 |
Name | Order | Citations | PageRank |
---|---|---|---|
David A. Hartley | 1 | 1 | 0.83 |
David M. Harvey | 2 | 6 | 2.50 |