Title
Minimizing the Number of Programming Steps for Diagnosis of Interconnect Faults in FPGAs
Abstract
This paper presents a procedure to diagnose single faults in SRAM Based FPGAs. The procedure is non-adaptive and requires six programming steps to give the ex-act position and type of any single fault in a FPGA. It is proved that the number of programming steps required for the procedure is minimal for a non-adaptive procedure with the given interconnect model.
Year
DOI
Venue
1999
10.1109/ATS.1999.810775
Asian Test Symposium
Keywords
Field
DocType
programming steps,ex-act position,interconnect faults,programming step,non-adaptive procedure,single fault,fpga,application specific integrated circuits,field programmable gate arrays,testing,switches,logic programming,fault detection
Stuck-at fault,Fault detection and isolation,Logic testing,Computer science,Field-programmable gate array,Electronic engineering,Real-time computing,Static random-access memory,Interconnection,Embedded system
Conference
ISBN
Citations 
PageRank 
0-7695-0315-2
5
0.64
References 
Authors
7
4
Name
Order
Citations
PageRank
Yinlei Yu1955.96
Jian Xu2211.58
Wei Kang Huang319822.34
Fabrizio Lombardi41985259.25