Abstract | ||
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In ultra deep submicron (UDSM) circuit design, theinterconnect delay and noise have become the dominantfactors in determining circuit performance. Analyticalexpressions are preferred because simulation is alwaysexpensive and ineffective in use with modern designscontaining millions of transistors and wires. However,analytical expressions are not sufficiently accurate anddo not consider all of interconnect and driverparameters. In this paper, we analyze the effects of allknown interconnect and driver parameters on thecrosstalk peak noise, crosstalk noise pulse width, and theimpact of coupling on aggressor delay. We considerparameters like spacing between wires, wire length,coupling length, load capacitance, rise time of the inputs,place of overlap (near driver or receiver side), frequency,direction of the signals, wire width for both theaggressors and the victim wires. Also, we considerparameters like driver strength as several recent studiesconsidered the simultaneous device and interconnectsizing. |
Year | DOI | Venue |
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2003 | 10.1109/ISVLSI.2003.1183461 | ISVLSI |
Keywords | Field | DocType |
thecrosstalk peak noise,circuit performance,circuit design,victim wire,driver parameter,crosstalk noise analysis,driver strength,aggressor delay,ultra deep submicrometer technologies,coupling length,theinterconnect delay,crosstalk noise pulse width,integrated circuit design,crosstalk | Discrete circuit,Capacitance,Circuit extraction,Rise time,Circuit design,Electronic engineering,Substrate coupling,Integrated circuit design,Engineering,Electrical engineering,Phantom circuit | Conference |
ISSN | ISBN | Citations |
2159-3469 | 0-7695-1904-0 | 4 |
PageRank | References | Authors |
1.00 | 3 | 3 |
Name | Order | Citations | PageRank |
---|---|---|---|
Mohamed A. Elgamel | 1 | 64 | 9.44 |
Kannan S. Tharmalingam | 2 | 8 | 1.56 |
Magdy A. Bayoumi | 3 | 803 | 122.04 |