Title
Design and Testing of an Integrated Circuit for Multi-Electrode Neural Recording
Abstract
We have developed a single-chip neural recording system with wireless power delivery and telemetry. The 0.5-脢m CMOS IC is designed to be bonded to the back of a 100-channel Utah Electrode Array. A pad near each amplifier allows connection of the chip to the MEMS electrode array. The complete Integrated Neural Interface will receive power wirelessly through a 2.64-MHz inductive link. A clock, regulated supply, and commands are derived from the power signal .The neural amplifiers each have a gain of 60 dB. A 10-bit charge-redistribution ADC is used to digitize the signal from one amplifier selected with an analog MUX. Digitizing all channels simultaneously would generate prohibitively high data rates; therefore, we perform data reduction by incorporating one-bit gspike detectors h into each amplifier. Neural data is transmitted off chip using an -integrated 433-MHz FSK transmitter. The chip measures 4.7 5.9 mm2 and consumes 13.5 mW of power.
Year
DOI
Venue
2007
10.1109/VLSID.2007.63
VLSI Design
Keywords
Field
DocType
neural data,integrated circuit,chip measure,single-chip neural recording system,wireless power delivery,high data rate,power wirelessly,10-bit charge-redistribution,multi-electrode neural recording,data reduction,neural amplifier,power signal,telemetry,chip,cmos integrated circuits,integrated circuit design
Electrode array,Computer science,Circuit design,CMOS,Electronic engineering,Chip,Integrated circuit design,Mixed-signal integrated circuit,Electrical engineering,Integrated circuit,Amplifier
Conference
ISSN
ISBN
Citations 
1063-9667
0-7695-2762-0
1
PageRank 
References 
Authors
0.39
1
7
Name
Order
Citations
PageRank
Reid R Harrison122257.49
Paul T. Watkins226.11
Ryan J. Kier31919.34
Daniel J. Black426.11
Robert O. Lovejoy526.11
Richard A. Normann6439.07
Florian Solzbacher723766.34