Name
Abstract | ||
|---|---|---|
Most of today's computer architectures employ fast, yet relatively small cache memories in order to mitigate the effects of the constantly widening gap between CPU speed and main memory performance. Efficient execution of numerically intensive programs can only be expected if these hierarchical memory designs are respected. Our work targets the optimization of the cache performance of multigrid codes. The research efforts we will present in this paper first cover transformations that may be automized and then focus on fundamental algorithmic modifications which require careful mathematical analysis. We will present experimental results for the latter. |
Year | DOI | Venue |
|---|---|---|
2004 | 10.1007/11558958_109 | PARA |
Keywords | Field | DocType |
patch-adaptive relaxation,careful mathematical analysis,cover transformation,main memory performance,cpu speed,small cache memory,efficient execution,hierarchical memory design,computer architecture,cache performance,mathematical analysis,cache memory | Algorithmics,Adaptive method,Computer science,Cache,Parallel algorithm,CPU cache,Parallel computing,Theoretical computer science,Instructions per second,Multigrid algorithm,Multigrid method | Conference |
ISBN | Citations | PageRank |
3-540-29067-2 | 1 | 0.47 |
References | Authors | |
3 | 3 | |
Name | Order | Citations | PageRank |
|---|---|---|---|
| Markus Kowarschik | 1 | 222 | 42.67 |
| Iris Christadler | 2 | 7 | 1.81 |
| Ulrich Rüde | 3 | 505 | 72.00 |