Title
A highly integrated analog front-end for 3G
Abstract
This paper describes a reconfigurable analog front-end (AFE) and audio codec IC supporting the wideband code division multiple access (WCDMA) standard. The chip is fabricated on Intel's 0.18-μm (SOC) flash+logic+analog (FLA) process technology using a 0.35-μm feature size analog transistor. The transmit path contains a 10-bit segmented rail-to-rail digital-to-analog converter, automatically tunable active RC filter, and programmable gain amplifier (PGA) with self-tuning gain and offset correction circuit. The receive path incorporates a PGA, active RC filter, and an 8-bit analog-to-digital converter with built-in offset correction. The AFE operates at 2.7 V with a current consumption of 55 mA and total active area of 15 mm2.
Year
DOI
Venue
2003
10.1109/JSSC.2003.810059
Solid-State Circuits, IEEE Journal of
Keywords
DocType
Volume
3G mobile communication,analogue-digital conversion,cellular radio,code division multiple access,digital-analogue conversion,speech codecs,system-on-chip,0.18 micron,0.35 micron,10 bit,2.7 V,3G,55 mA,8 bit,FLA,PGA,SOC,WCDMA,audio codec IC,cellphone,offset correction circuit,programmable gain amplifier,rail-to-rail digital-to-analog converter,reconfigurable analog front-end,self-tuning gain,tunable active RC filter,wideband code division multiple access
Journal
38
Issue
ISSN
Citations 
5
0018-9200
3
PageRank 
References 
Authors
0.76
0
6
Name
Order
Citations
PageRank
Khalil, W.130.76
Tsung-yuan Chang241.17
Xuewen Jiang3325.13
S. R. Naqvi430.76
B. Nikjou530.76
J. Tseng630.76