Paper Info
Title
Fault tolerant multiple-bus interconnection networks
Abstract
In this paper we present an original approach to fault tolerant interconnection networks for multiprocessor systems. The considered networks are based on multiple-bus structures which are provided with some additional hardware allowing to tolerate a large class of faults. Faults are identified with specially developed testing procedures.
Year
DOI
Venue
1993
10.1016/0165-6074(93)90121-Z
Microprocessing and Microprogramming
Keywords
DocType
Volume
interconnection network,fault tolerant
Journal
38
Issue
ISSN
Citations 
1
Microprocessing and Microprogramming
0
PageRank 
References 
Authors
0.34
0
1
Name
Order
Citations
PageRank
J. Sosnowski1183.23