Name
Abstract | ||
|---|---|---|
The number of cores on a single silicon chip is rapidly growing and chips containing tens or even hundreds of identical cores are expected in the future. To take advantage of multicore chips, multiple applications will run simultaneously. As a consequence, the traffic interferences between applications increases and the performance of individual applications can be seriously affected. In this paper, we improve the individual application performance when several applications are simultaneously running. This proposal is based on the virtualization concept and allows us to reduce execution time and network latency in a significant percentage. |
Year | DOI | Venue |
|---|---|---|
2011 | 10.1016/j.micpro.2010.10.001 | Microprocessors and Microsystems - Embedded Hardware Design |
Keywords | Field | DocType |
execution time,multicore chip,virtualization,performance evaluation,single silicon chip,individual application performance,significant percentage,multiple application,identical core,network latency,applications increase,individual application,network-on-chip resource,network-on-chip,network on chip,chip | Virtualization,Silicon chip,Computer science,Latency (engineering),Parallel computing,Network on a chip,Real-time computing,Chip,Execution time,Multi-core processor,Embedded system | Journal |
Volume | Issue | ISSN |
35 | 2 | Microprocessors and Microsystems |
Citations | PageRank | References |
15 | 0.64 | 34 |
Authors | ||
4 | ||
Name | Order | Citations | PageRank |
|---|---|---|---|
| Francisco Triviño | 1 | 53 | 3.31 |
| José L. Sánchez | 2 | 252 | 40.65 |
| Francisco J. Alfaro | 3 | 170 | 24.50 |
| José Flich | 4 | 268 | 26.03 |