Title
Efficient deblocking filter architecture for H.264 video coders
Abstract
In this paper, an efficient in-loop deblocking filter architecture for H.264 video coding system is proposed. The deblocking filter usually need perform both vertical and horizontal directions. A novel data arrangement, called the group-of-pixel (GOP), is designed to efficiently arrange the pixel data stored in on-chip memory. With the proposed GOP arrangement, we do not need the transpose memory, which often occupies excessive chip area, to transpose the direction of the pixel data filtering. Furthermore, the number of total cycles required for GOP-based deblocking filter is reduced significantly. The proposed in-loop GOP-based deblocking filter architecture synthesized with UMC 0.18 mum technology could process real-time video in 720p HD (1280times720) format operated at 100 MHz
Year
DOI
Venue
2006
10.1109/ISCAS.2006.1693160
ISCAS
Keywords
Field
DocType
pixel data filtering,umc technology,deblocking filter architecture,data arrangement,adaptive filters,gop arrangement,video coding,group-of-pixel arrangement,h.264 video coding system,h.264 video coders,0.18 micron,100 mhz,on-chip memory,hardware,acceleration,filtering,low pass filters,chip,real time,decoding,quantization
Architecture,Data filtering,Transpose,Computer science,Coding system,Electronic engineering,Chip,Adaptive filter,Pixel,Computer hardware,Deblocking filter
Conference
ISSN
ISBN
Citations 
0271-4302
0-7803-9389-9
10
PageRank 
References 
Authors
0.97
3
4
Name
Order
Citations
PageRank
Heng-yao Lin1675.96
Jwu-jin Yang2100.97
Bin-da Liu356366.56
Jar-Ferr Yang41115142.85