Abstract | ||
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We describe the hardwired implementation of algorithms for Monte Carlo simulations of a large class of spin models. We have implemented these algorithms as VHDL codes and we have mapped them onto a dedicated processor based on a large FPGA device. The measured performance on one such processor is comparable to O(100) carefully programmed high-end PCs: it turns out to be even better for some selected spin models. We describe here codes that we are currently executing on the IANUS massively parallel FPGA-based system. |
Year | DOI | Venue |
---|---|---|
2007 | 10.1016/j.cpc.2007.09.006 | Computer Physics Communications |
Keywords | DocType | Volume |
05.10.Ln,05.10.-a,07.05.Tp,07.05.Bx | Journal | 178 |
Issue | ISSN | Citations |
3 | 0010-4655 | 12 |
PageRank | References | Authors |
1.93 | 0 | 18 |
Name | Order | Citations | PageRank |
---|---|---|---|
F. Belletti | 1 | 28 | 4.50 |
M. Cotallo | 2 | 12 | 2.27 |
A. Cruz | 3 | 22 | 3.34 |
Luis Antonio Fernandez | 4 | 12 | 2.27 |
A. Gordillo | 5 | 23 | 4.37 |
A. Maiorano | 6 | 12 | 1.93 |
F. Mantovani | 7 | 21 | 3.01 |
enzo marinari | 8 | 13 | 2.32 |
Victor Martin-Mayor | 9 | 33 | 5.32 |
Antonio Munoz Sudupe | 10 | 30 | 5.08 |
D. Navarro | 11 | 13 | 2.32 |
S. Perez-Gaviro | 12 | 13 | 2.65 |
J. Ruiz-Lorenzo | 13 | 13 | 2.99 |
Sebastiano Fabio Schifano | 14 | 191 | 28.37 |
D. Sciretti | 15 | 12 | 1.93 |
A. Tarancón | 16 | 12 | 2.27 |
R. Tripiccione | 17 | 73 | 12.68 |
Jose Luis Velasco | 18 | 23 | 4.60 |