Name
Abstract | ||
|---|---|---|
Recent advances in computer technology have made the design of large and very flexible associative processors possible. Such systems are extremely complex and must be adequately protected against failures if they are to be used in critical application areas such as air traffic control or for performing control functions in fault-tolerant computers. This paper summarizes the results of a study which has indicated the techniques that are applicable in the design of fault tolerant associative processors. Associative processors are divided into four classes of fully parallel, bit-serial, word-serial, and block-oriented systems. A technique for modularizing the design of an associative processor is given. The detection of errors within modules is discussed for the four classes mentioned above. Several schemes for reconfiguration are discussed which allow us to establish an appropriate inter-communication pattern after replacing the faulty module by a spare. The design of a fault-tolerant associative processor, which uses some of the techniques discussed previously, is presented. |
Year | DOI | Venue |
|---|---|---|
1973 | 10.1145/800123.803979 | ISCA |
Keywords | Field | DocType |
air traffic control,register transfer level,fault tolerant,design automation | Associative property,Content-addressable memory,Spare part,Computer science,Parallel computing,Real-time computing,Electronic design automation,Fault tolerance,Register-transfer level,Computer technology,Control reconfiguration | Conference |
Volume | Issue | ISSN |
2 | 4 | 0163-5964 |
Citations | PageRank | References |
3 | 0.46 | 4 |
Authors | ||
2 | ||
Name | Order | Citations | PageRank |
|---|---|---|---|
| Behrooz Parhami | 1 | 687 | 104.30 |
| Algirdas Avizienis | 2 | 3116 | 351.14 |