Name
Title | ||
|---|---|---|
A 52mW 0.56mm2 1.2V 12b 120MS/s SHA-Free dual-channel Nyquist ADC based on mid-code calibration |
Abstract | ||
|---|---|---|
This work describes a 12 b 120 MS/s dual-channel SHA-free Nyquist ADC based on a mid-code calibration technique eliminating offset mismatch between channels. The prototype ADC achieves a peak SNDR of 61.1 dB and a peak SFDR of 74.7 dB for input frequencies up to 60 MHz at 120 MS/s. Also, the measured DNL and INL are within plusmn0.30 LSB and plusmn0.95 LSB, respectively. The ADC fabricated in a 0.13 mum CMOS process occupies an active die area of 0.56 mm and consumes and consumes 51.6 mW. |
Year | DOI | Venue |
|---|---|---|
2008 | 10.1109/ISCAS.2008.4541341 | ISCAS |
Keywords | DocType | ISSN |
CMOS process,CMOS integrated circuits,calibration,signal sampling,analogue-digital conversion,voltage 1.2 V,INL,measured DNL,SFDR,high-speed integrated circuits,mid-code calibration technique,ADC fabrication,offset mismatch elimination,size 0.13 mum,SHA-free dual-channel Nyquist ADC,power 52 mW | Conference | 0271-4302 |
ISBN | Citations | PageRank |
978-1-4244-1684-4 | 0 | 0.34 |
References | Authors | |
0 | 7 | |
Name | Order | Citations | PageRank |
|---|---|---|---|
| Hee-Cheol Choi | 1 | 26 | 10.68 |
| Young-Ju Kim | 2 | 268 | 29.56 |
| Se-won Lee | 3 | 4 | 0.93 |
| Jae-yeol Han | 4 | 4 | 3.70 |
| Ohbong Kwon | 5 | 0 | 1.01 |
| Young-Lok Kim | 6 | 17 | 4.26 |
| Seunghoon Lee | 7 | 244 | 61.57 |