Title | ||
---|---|---|
A Resistance Matching Based Self-Testable Current-Mode R-2r Digital-To-Analog Converter |
Abstract | ||
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This paper presents a resistance matching based self-testable current-mode R-2R Digital-to-Analog Converter (DAC). The Built-In Self-Test (BIST) circuits are employed to observe the current redistributions in the resistance matching branches converted from the R-2R network in the DAC, and then the redistributed currents are transformed to voltages to detect the R-2R network with extra Design For Testability (DFT) circuits. The circuit-level simulation of the proposed BIST system are presented to demonstrate the feasibility with fault coverage of 96% for R-2R network and 82.6% for the Operational Amplifier (OpAmp), and area overhead of approximately 6%. |
Year | DOI | Venue |
---|---|---|
2013 | 10.1587/elex.10.20130753 | IEICE ELECTRONICS EXPRESS |
Keywords | Field | DocType |
built-in self-test, resistance matching, design for testability, digital-to-analog converter | Design for testing,Computer science,Electronic engineering,Digital-to-analog converter,Current mode,Built-in self-test | Journal |
Volume | Issue | ISSN |
10 | 23 | 1349-2543 |
Citations | PageRank | References |
0 | 0.34 | 0 |
Authors | ||
2 |
Name | Order | Citations | PageRank |
---|---|---|---|
Jun Yuan | 1 | 244 | 23.10 |
Masayoshi Tachibana | 2 | 1 | 2.73 |