Name
Abstract | ||
|---|---|---|
The concepts underlying a versatile tiered layout design scheme for MOS LSI logic devices is presented. A series of three computer-aided design programs is discussed which provide designers with information permitting rapid organization of minimum area layout designs. |
Year | DOI | Venue |
|---|---|---|
1971 | 10.1145/800158.805067 | DAC |
Keywords | Field | DocType |
versatile tiered layout design,optimum mos lsi device,rapid organization,minimum area layout design,mos lsi logic device,computer-aided design program,logic equation,computer aided design | Page layout,Computer science,IC layout editor,Electronic engineering | Conference |
Citations | PageRank | References |
0 | 0.34 | 1 |
Authors | ||
2 | ||
Name | Order | Citations | PageRank |
|---|---|---|---|
| R. P. Larsen | 1 | 1 | 0.82 |
| L. Margol | 2 | 0 | 0.34 |