Title
A comparative study between Fractional-N PLL and Flying-Adder PLL
Abstract
Frequency synthesis is one of the most important and most actively researched subjects in the field of VLSI mixed-signal circuit design. Among the existing techniques in this area, Fractional-N architecture is a widely used one for generating frequencies which are not integer multiple of the input reference frequency. Flying-Adder architecture is an emerging technique which is based on a new concept, Time-Average-Frequency, to generate frequencies. This paper presents an in-depth analysis and comparison between the two methods.
Year
DOI
Venue
2010
10.1109/ISCAS.2010.5537927
ISCAS
Keywords
Field
DocType
adders,flying-adder pll,frequency synthesis,flying-adder architecture,fractional-n pll,fractional-n architecture,vlsi mixed-signal circuit design,phase-lock loop,phase locked loops,mixed analogue-digital integrated circuits,vlsi,frequency synthesizers,time-average-frequency,comparative study,phase lock loop,time frequency analysis,circuit design,frequency modulation
Integer,Phase-locked loop,Adder,Computer science,Circuit design,Electronic engineering,Time–frequency analysis,Frequency modulation,Very-large-scale integration,Multiple
Conference
ISSN
ISBN
Citations 
0271-4302
978-1-4244-5309-2
0
PageRank 
References 
Authors
0.34
7
3
Name
Order
Citations
PageRank
Liming Xiu110314.36
Chen-Wei Huang21259.03
Ping Gui375.13