Name
Abstract | ||
|---|---|---|
The design and evaluation of a 3-dimensional FPGA architecture called Rothko will be described. Rothko takes advantage of a novel 3-dimensional VLSI circuit technology developed at Northeastern University that is based on transferred circuits with interconnections between layers of circuits. The Rothko 3-D FPGA architecture is based on a sea-of-gates FPGA model first proposed in the Triptych architecture (a 2-D architecture) in which individual cells have the dual functions of routing and logic implementation. Our 3-D VLSI technology allows metal interconnections to be made between cells on different layers so that Rothko is truly 3-D. A very fine-grain interconnection scheme is provided with each cell connected to the one above/below it. In this paper we present the architectural design of this 3-D FPGA. The 3-D technology that supports the Rothko architecture is also described. An example of mapping a combinational multiplier to both the Rothko and Triptych architectures is provided to demonstrate the advantages of Rothko. |
Year | DOI | Venue |
|---|---|---|
1997 | 10.1109/ARVLSI.1997.634858 | Ann Arbor, MI |
Keywords | Field | DocType |
3 dimensional,field programmable gate arrays,vlsi,propagation delay,very large scale integration,routing,switches,computer architecture,network routing,application specific integrated circuits,three dimensional | Architecture,Computer architecture,Architectural design,Field-programmable gate array,Multiplier (economics),Engineering,Electronic circuit,Interconnection,Very-large-scale integration,AND gate | Conference |
ISBN | Citations | PageRank |
0-8186-7913-1 | 10 | 1.00 |
References | Authors | |
4 | 4 | |
Name | Order | Citations | PageRank |
|---|---|---|---|
| Waleed Meleis | 1 | 157 | 18.29 |
| Miriam Leeser | 2 | 791 | 119.08 |
| Paul M. Zavracky | 3 | 31 | 4.67 |
| Mankuan Michael Vai | 4 | 35 | 300.56 |