Name
Title | ||
|---|---|---|
Implementation of a network flow lookup circuit for next-generation packet classifiers |
Abstract | ||
|---|---|---|
This paper presents a lookup circuit with advanced memory techniques and algorithms that examines network packet headers at high throughput rates. Hardware solutions and test scenarios are introduced to evaluate the proposed approach. The experimental results show that the proposed lookup circuit is able to achieve at least 39 million packet header lookups per second, which facilitates the application of next-generation stateful packet classifications at beyond 20Gbps internet traffic throughput rates. |
Year | DOI | Venue |
|---|---|---|
2012 | 10.1109/SOCC.2012.6398349 | SoCC |
Keywords | Field | DocType |
advanced memory techniques,hardware solutions,network flow lookup circuit,next-generation stateful packet classifications,network packet headers,high-density ddr sdram,sram chips,internet traffic throughput rates,internet,next-generation packet classifiers,packet header lookups,table lookup | Packet analyzer,Computer science,Internet traffic engineering,Network packet,Computer network,Real-time computing,Stateful firewall,Throughput,Header,Fast packet switching,Processing delay | Conference |
ISSN | ISBN | Citations |
2164-1676 | 978-1-4673-1294-3 | 1 |
PageRank | References | Authors |
0.38 | 10 | 2 |
Name | Order | Citations | PageRank |
|---|---|---|---|
| Xin Yang | 1 | 22 | 4.91 |
| Sakir Sezer | 2 | 1010 | 84.22 |