Title
An FPGA Application with High Speed Serial Transceiver Running at Sub-nominal Rate
Year
Venue
Keywords
2005
FPL
field programmable gate arrays,phase locked loops,transceivers,physical layer,local area networks,logic design
Field
DocType
Citations 
Phase-locked loop,Transceiver,Oversampling,Operating point,Computer science,Field-programmable gate array,Real-time computing,Ethernet,Data recovery,Synchronous Ethernet
Conference
0
PageRank 
References 
Authors
0.34
3
2
Name
Order
Citations
PageRank
Dusan Suvakovic1174.96
Ilija Hadzic2286.20