Abstract | ||
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Dynamic power gating applicable to FPGA can reduce the power consumption effectively. In this paper, we propose a sophisticated routing architecture for a region oriented FPGA which supports dynamic power gating. This is the first routing solution of dynamic power gating for coarse-grained FPGA. This paper has 2 main contributions. First, it improves the routing resource graph and routing architecture to support special routing for a region oriented FPGA. Second, some routing channels are made wider to avoid congestion. Experimental result shows that 7.7% routing area can lie reduced compared with the symmetric Wilton switch box in the region. Also, our proposed FPGA architecture with sophisticated P&R can reduce the power consumption of the system implemented in FPGA. |
Year | DOI | Venue |
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2012 | 10.1587/transfun.E95.A.2199 | IEICE TRANSACTIONS ON FUNDAMENTALS OF ELECTRONICS COMMUNICATIONS AND COMPUTER SCIENCES |
Keywords | Field | DocType |
FPGA, low power, switch box, routing | Computer architecture,Gating,Switch box,Field-programmable gate array,Theoretical computer science,Dynamic demand,Fpga architecture,Mathematics,Embedded system | Journal |
Volume | Issue | ISSN |
E95A | 12 | 0916-8508 |
Citations | PageRank | References |
0 | 0.34 | 14 |
Authors | ||
3 |
Name | Order | Citations | PageRank |
---|---|---|---|
Ce Li | 1 | 56 | 9.28 |
Yiping Dong | 2 | 8 | 1.84 |
Takahiro Watanabe | 3 | 29 | 15.61 |