Name
Abstract | ||
|---|---|---|
In this paper, we present a unified approach for the verification and validation of software and systems engineering design models expressed in UML 2.0 and SysML 1.0. The approach is based on three well-established techniques, namely formal analysis, programme analysis and software engineering (SwE) techniques. More precisely, our contribution consists of the synergistic combination of model checking, static analysis and SwE metrics that enables the automatic and efficient assessment of design models from static and dynamic perspectives. Additionally, we present the design and implementation of an automated computer-aided assessing framework integrating the proposed approach. Moreover, we discuss the related technical details and the underlying synergism. Finally, we illustrate the proposed approach by assessing a design case study that is composed of state machine and sequence diagrams. |
Year | DOI | Venue |
|---|---|---|
2009 | 10.1080/03081070903029253 | INTERNATIONAL JOURNAL OF GENERAL SYSTEMS |
Keywords | Field | DocType |
software and systems engineering, UML, SysML, design models, verification and validation, model checking, software metrics | Model checking,Unified Modeling Language,Verification and validation,Software engineering,Computer science,Static analysis,Software metric,Software verification and validation,Systems Modeling Language,Software verification | Journal |
Volume | Issue | ISSN |
38 | 7 | 0308-1079 |
Citations | PageRank | References |
0 | 0.34 | 22 |
Authors | ||
5 | ||
Name | Order | Citations | PageRank |
|---|---|---|---|
| Yosr Jarraya | 1 | 173 | 14.52 |
| Andrei Soeanu | 2 | 43 | 7.49 |
| Luay Alawneh | 3 | 70 | 9.18 |
| Mourad Debbabi | 4 | 1467 | 144.47 |
| Fawzi Hassaïne | 5 | 16 | 2.14 |