Name
Abstract | ||
|---|---|---|
This paper presents a fully integrated 10GBase-LX4 Ethernet receiver front-end automatic gain control amplifier realized in a 0.18μm CMOS process. Based on a very compact and reliable inductorless design, the proposed differential post-amplifier, comprises three main digitally programmable gain stages, a DC offset cancellation network and an automatic gain feedback control loop. Experimental results demonstrate a −3dB cut-off frequency above 2.3GHz over a −3 to 33dB linear-in-dB controlled gain range with a sensitivity of 2.0mVp–p with a BER of 10−12 at 2.5Gb/s. For the aforementioned standard, 3.125Gb/s, an input dynamic range above 50dB is achieved, from 2.5mVp–p to 800mVp–p, indicating a BER of 10−12. The chip core area is 0.3×0.3 mm2 and it consumes 58 mW with a single supply voltage of 1.8V. |
Year | DOI | Venue |
|---|---|---|
2011 | 10.1016/j.microrel.2011.02.001 | Microelectronics Reliability |
DocType | Volume | Issue |
Journal | 51 | 5 |
ISSN | Citations | PageRank |
0026-2714 | 0 | 0.34 |
References | Authors | |
0 | 3 | |
Name | Order | Citations | PageRank |
|---|---|---|---|
| Francisco Aznar | 1 | 25 | 7.61 |
| Santiago Celma | 2 | 145 | 43.45 |
| Belén Calvo | 3 | 120 | 27.19 |