Paper Info
Title
An effective approach to automatic functional processor test generation for small-delay faults
Abstract
Functional microprocessor test methods provide several advantages compared to DFT approaches, like reduced chip cost and at-speed execution. However, the automatic generation of functional test patterns is an open issue. In this work we present an approach for the automatic generation of functional microprocessor test sequences for small-delay faults based on Bounded Model Checking. We utilize an ATPG framework for small-delay faults in sequential, non-scan circuits and propose a method for constraining the input space for generating functional test sequences (i.e., test programs). We verify our approach by evaluating the miniMIPS microprocessor. In our experiments we were able to reach over 97 % fault efficiency. To the best of our knowledge, this is the first fully automated approach to functional microprocessor test for small-delay faults.
Year
DOI
Venue
2014
10.7873/DATE.2014.140
Design, Automation and Test in Europe Conference and Exhibition
Keywords
Field
DocType
functional test pattern,functional microprocessor test method,effective approach,test program,functional microprocessor test sequence,automatic functional processor test,minimips microprocessor,functional microprocessor test,dft approach,automatic generation,small-delay fault,functional test sequence,logic gates,automatic test pattern generation,sequential circuits
Automatic test pattern generation,Sequential logic,Model checking,Automatic test equipment,Computer science,Microprocessor,Real-time computing,Chip,Electronic circuit,Test compression
Conference
ISSN
Citations 
PageRank 
1530-1591
10
0.52
References 
Authors
18
6
Name
Order
Citations
PageRank
Andreas Riefert1302.27
Lyl Ciganda2191.86
Matthias Sauer319520.02
Paolo Bernardi424430.63
Matteo Sonza Reorda51250136.66
Bernd Becker685573.74