Name
Abstract | ||
|---|---|---|
The performance and efficiency of event-driven simulations, such as VHDL and Verilog simulation, depend on the number of events that occur during the simulation. In this paper, we classify events into two categories, sensitive events and insensitive events, according to the necessity of simulations, and implement the optimization methodology that eliminates unnecessary simulations caused by the insensitive events. Five experiments show that optimized VHDL programs run much faster than the original ones |
Year | DOI | Venue |
|---|---|---|
1997 | 10.1109/SIMSYM.1997.586539 | Annual Simulation Symposium |
Keywords | DocType | ISSN |
discrete event simulation,logic CAD,sensitive event,insensitive event,optimization methodology,hardware description languages,VHDL programs,verilog simulation,unnecessary simulation,vhdl simulation,optimization,sensitive events,insensitive events,optimized vhdl program,event-driven simulation,event-driven simulations,VHDL simulation,classifying events | Conference | 1080-241X |
ISBN | Citations | PageRank |
0-8186-7934-4 | 0 | 0.34 |
References | Authors | |
1 | 6 | |
Name | Order | Citations | PageRank |
|---|---|---|---|
| Kwang II Park | 1 | 0 | 0.34 |
| Jun Sung Kim | 2 | 50 | 6.68 |
| kim hb kim heung bum | 3 | 25 | 2.17 |
| Jong Hyuk Choi | 4 | 32 | 5.32 |
| Kyu Ho Park | 5 | 729 | 79.92 |
| park ki park kwang il | 6 | 0 | 0.34 |