Name
Title | ||
|---|---|---|
Exploiting Internal Operation Patterns during the High-Level Synthesis of Time-Constrained Circuits |
Abstract | ||
|---|---|---|
Conventional high-level synthesis algorithms treat specification operations as atomic elements that are executed in one or several consecutive cycles and over one functional unit. However, in most specifications there exist different operations, in function of their type, representation, and width that handled at different decomposition levels may produce better designs. In this way, most arithmetic operations can be decomposed into smaller operations applying several arithmetical properties. Different decompositions can be performed, in function of the pursued objective: performance improvement, area reduction, or power consumption reduction. In this paper we propose a pattern-based design methodology able to treat every operation at its most appropriate decomposition level. It produces reduced datapaths while meeting the specified time constraints. In comparison to conventional algorithms the amount of area saved averages 40%. |
Year | DOI | Venue |
|---|---|---|
2008 | 10.1109/DSD.2008.75 | DSD |
Keywords | Field | DocType |
schedules,functional unit,pattern matching,formal specification,high level synthesis,allocation,algorithm design and analysis,scheduling,design methodology | Arithmetic function,Algorithm design,Scheduling (computing),Computer science,High-level synthesis,Algorithm,Formal specification,Real-time computing,Schedule,Pattern matching,Performance improvement | Conference |
Citations | PageRank | References |
0 | 0.34 | 8 |
Authors | ||
4 | ||
Name | Order | Citations | PageRank |
|---|---|---|---|
| Pedro Garcia-Repetto | 1 | 0 | 0.34 |
| María C. Molina | 2 | 77 | 6.97 |
| Rafael Ruiz-Sautua | 3 | 32 | 5.28 |
| Guillermo Botella | 4 | 294 | 25.97 |