Name
Abstract | ||
|---|---|---|
This paper proposes a hardware managed instruction scratchpad on the granularity of functions which is designed for realtime systems. It guarantees that every instruction will be fetched from the local, fast and timing predictable scratchpad memory. Thus, a predictable behavior is reached that eases a precise timing analysis of the system. We estimate the hardware resources required to implement the dynamic instruction scratchpad for an FPGA. An evaluation quantifies the impact of our scratchpad on average case performance. It shows that the dynamic instruction scratchpad compared to standard instruction memories has a reasonable performance - while providing predictable behavior and easing timing analysis. |
Year | DOI | Venue |
|---|---|---|
2011 | 10.1007/978-3-642-19137-4_11 | ARCS |
Keywords | Field | DocType |
dynamic instruction scratchpad memory,hardware resource,reasonable performance,average case performance,standard instruction memory,dynamic instruction scratchpad,predictable behavior,timing analysis,timing predictable scratchpad memory,instruction scratchpad,embedded processor,precise timing analysis,real time systems | Computer architecture,Computer science,Parallel computing,Scratchpad memory,Field-programmable gate array,Real-time computing,Static timing analysis,Content management,Granularity,Computer hardware | Conference |
Volume | ISSN | Citations |
6566 | 0302-9743 | 14 |
PageRank | References | Authors |
0.63 | 18 | 4 |
Name | Order | Citations | PageRank |
|---|---|---|---|
| Stefan Metzlaff | 1 | 142 | 8.07 |
| Irakli Guliashvili | 2 | 113 | 4.66 |
| Sascha Uhrig | 3 | 313 | 24.54 |
| Theo Ungerer | 4 | 1262 | 136.24 |