Title | ||
---|---|---|
40.4fJ/bit/mm low-swing on-chip signaling with self-resetting logic repeaters embedded within a mesh NoC in 45nm SOI CMOS |
Abstract | ||
---|---|---|
Mesh NoCs are the most widely-used fabric in high-performance many-core chips today. They are, however, becoming increasingly power-constrained with the higher on-chip bandwidth requirements of high-performance SoCs. In particular, the physical datapath of a mesh NoC consumes significant energy. Low-swing signaling circuit techniques can substantially reduce the NoC datapath energy, but existing low-swing circuits involve huge area footprints, unreliable signaling or considerable system overheads such as an additional supply voltage, so embedding them into a mesh datapath is not attractive. In this paper, we propose a novel low-swing signaling circuit, a self-resetting logic repeater, to meet these design challenges. The SRLR enables single-ended low-swing pulses to be asynchronously repeated, and hence, consumes less energy than differential, clocked low-swing signaling. To mitigate global process variations while delivering high energy efficiency, three circuit techniques are incorporated. Fabricated in 45nm SOI CMOS, our 10mm SRLR-based low-swing datapath achieves 6.83Gb/s/μm bandwidth density with 40.4fJ/bit/mm energy at 4.1Gb/s data rate at 0.8V. |
Year | DOI | Venue |
---|---|---|
2013 | 10.7873/DATE.2013.332 | DATE |
Keywords | Field | DocType |
system on chip,robustness,embedded systems,fpga prototyping,bandwidth,threshold voltage | Datapath,Embedding,Computer science,Voltage,FPGA prototype,Real-time computing,Bandwidth (signal processing),Repeater,Electronic circuit,Virtual prototyping,Embedded system | Conference |
ISSN | Citations | PageRank |
1530-1591 | 7 | 0.58 |
References | Authors | |
14 | 4 |
Name | Order | Citations | PageRank |
---|---|---|---|
Sunghyun Park | 1 | 154 | 10.83 |
Masood Qazi | 2 | 115 | 9.10 |
Li-Shiuan Peh | 3 | 5077 | 398.57 |
Anantha P. Chandrakasan | 4 | 14442 | 1946.93 |