Name
Title | ||
|---|---|---|
Characterization And Analysis Of Gate-All-Around Si Nanowire Transistors For Extreme Scaling |
Abstract | ||
|---|---|---|
The gate-all-around (GAA) silicon nanowire transistor ( SNWT) is considered as one of the best candidates for ultimately scaled CMOS devices at the end of the technology roadmap. This paper reviews our recent work on the characterization and analysis of this unique one-dimensional nanowire-channel device with three-dimensional surrounding-gate from experiments and simulation, including carrier transport behavior, parasitic effects, noise characteristics, self-heating effect, variability and reliability, which can provide useful information for the GAA device hierarchical modeling and device/circuit co-design. |
Year | DOI | Venue |
|---|---|---|
2011 | 10.1109/CICC.2011.6055334 | 2011 IEEE CUSTOM INTEGRATED CIRCUITS CONFERENCE (CICC) |
Keywords | Field | DocType |
nanowires | Infrasound,Computer science,Technology roadmap,CMOS,Electronic engineering,Transistor,MOSFET,Scaling,Nanowire,Silicon | Conference |
Volume | Issue | Citations |
null | null | 1 |
PageRank | References | Authors |
0.40 | 1 | 13 |
Name | Order | Citations | PageRank |
|---|---|---|---|
| Ru Huang | 1 | 188 | 48.74 |
| Runsheng Wang | 2 | 169 | 21.11 |
| Jing Zhuge | 3 | 2 | 0.77 |
| Changze Liu | 4 | 6 | 2.27 |
| tao yu | 5 | 20 | 0.86 |
| Liangliang Zhang | 6 | 16 | 7.01 |
| Xin Huang | 7 | 1 | 0.40 |
| Yujie Ai | 8 | 1 | 0.73 |
| Jinbin Zou | 9 | 2 | 0.77 |
| Yuchao Liu | 10 | 71 | 8.21 |
| Jiewen Fan | 11 | 1 | 0.40 |
| Huailin Liao | 12 | 83 | 14.91 |
| Yangyuan Wang | 13 | 142 | 23.85 |