Title
Design and analysis of a switched-capacitor-based peak detector.
Abstract
In this paper, a CMOS peak detector is proposed. The proposed peak detection is based on signal's slope variation and it can be easily exploited for positive as well as negative peak detection. Besides it can also be used for multiple peak detection without needing resetting operation, making the circuit implementation quite simple. A switched-capacitor-based (SC-based) implementation is given along with performance analysis based on functional as well as analytical model. The developed analysis gives an insight into the potential performance as well as a design guide to reach the desired target. To have a relative error less than 1 %, the frequency ratio of sampling signal to input signal should be over 22. The proposed peak detector's operation is confirmed by experimental results from Anadigm FPAA developing board.
Year
DOI
Venue
2011
10.1109/ISCAS.2011.5937737
ISCAS
Keywords
Field
DocType
relative error,switches,cmos integrated circuits,detectors,field programmable analog array,switched capacitor,accuracy
Computer science,Control theory,Switched capacitor,CMOS,Electronic engineering,Sampling (statistics),Field-programmable analog array,Precision rectifier,Electrical engineering,Detector,Approximation error,Frequency ratio
Conference
ISSN
ISBN
Citations 
0271-4302 E-ISBN : 978-1-4244-9472-9
978-1-4244-9472-9
1
PageRank 
References 
Authors
0.40
1
3
Name
Order
Citations
PageRank
Ming Zhang1157.12
Nicolas Llaser2168.11
Hervé Mathias3125.30