Name
Abstract | ||
|---|---|---|
We propose a new layout synthesis with 2-dimensional transistor arrangement and a spontaneous process of 2-dimensional compaction and local re-routing. The compaction enables jumping over objects, minimizing the number of contacts for wiring. We applied the layout synthesis to actual cell design and obtained comparable results to hand- crafted design. I. INTRODUCTION The recent advances and diversification in fabrication technology activate the strong requirement for designing leaf cell libraries in a quite short period with as little effort as possible. Establishing a strong physical synthesis procedure for the rapid technology changes toward deep sub-micron is in demand. The circuits of the cells are reusable in many practical situations. Transistor sizing(1) and layout synthesis take the main part of the physical synthesis. Our contribution is to propose an efficient algorithm for the layout synthesis process. Physical cell design is generally defined by a task of implementing the placement and wiring of the given circuit with minimum cell width for the given cell layout structure - - i.e., standard cells, I/O cells, data path cells, etc. The structure profile includes the height of the cell, N-well width, location and width of power and ground lines, and constrains on the cell boundary and pins. Diffusion sharing of transistors is quite efficient if the shared parts are carefully selected. Layout compaction plays an important role of the layout synthesis. The mid 70s was the early stage of the compaction researches. Many symbolic data models, e.g., fixed grid(2), constraint graph(3), virtual grid(4), and compaction methods for those data models were proposed. Those compactors are categorized in one dimensional compaction since the direction of the movement is limited to either vertical or horizontal. Two dimensional compaction was applied by alternating process of one-dimensional compaction in both vertical and horizontal directions(4). Dramatic improvement has been made by the appearance of true two-dimensional compaction(5-6) in the 80s. Shin and others' "Zone Refine"(6) method formulates the 2- dimensional movements by an analogy of zone refining of a crystal ingot. The algorithm can escape from local dead lock that is found in one-dimensional compaction. However, the layout model was too simple and needs further work to apply it to actual cell design. It represents transistors with boxes and wires connected to some boxes. A model that expresses the diffusion share of transistors and cell structure is required. Additionally, a movement in which one layout element skips over another element has not been achieved by conventional compactors but it is quite an efficient movement to save the cell area. |
Year | DOI | Venue |
|---|---|---|
1995 | 10.1145/224818.224907 | ASP-DAC |
Keywords | DocType | ISBN |
leaf cell design,new layout synthesis,network synthesis,data model,2 dimensional,transistors | Conference | 0-89791-766-9 |
Citations | PageRank | References |
4 | 0.46 | 17 |
Authors | ||
3 | ||
Name | Order | Citations | PageRank |
|---|---|---|---|
| Masahiro Fukui | 1 | 42 | 14.57 |
| Noriko Shinomiya | 2 | 5 | 0.84 |
| Toshiro Akino | 3 | 18 | 15.05 |