Paper Info
Title
Hardware Versus Software Implementation of COMA
Abstract
Traditionally, cache coherence in multiprocessors has been maintained in hardware. However, the cost-effectiveness of hardwired protocols is questionable. Virtual Shared Memory systems have highlighted the many advantages of software-implemented protocols, albeit at a performance price. The performance gap is narrowed by hybrid systems with the addition of hardware support for fine-grain sharing. We have developed a software protocol for a COMA (Cache-Only Memory Architecture). We call the system SC-COMA for Software-Controlled COMA, to emphasize that the protocol engine is emulated by software executed on the main processor. Contrary to user-level protocols, the software handling coherence events in SC-COMA runs in sub-kernel mode, transparently providing the same services to applications as a hardware counterpart. The software emulation layer has been written and we compare SC-COMA to an idealized hardware COMA through detailed simulations. Our results show that SC-COMA is competitive. On systems with 32 processors, it achieves a slowdown of 11-56% with respect to its hardware counterpart, across a range of applications and memory pressures. SC-COMA scales well, up to 32 nodes. A study on the impact of faster processors on SC-COMA's relative performance indicates a consistent improvement, but with a limitation due to the loosely-integrated design. We conclude that SC-COMA is a viable solution to easily transform networks of workstations into powerful multiprocessors.
Year
DOI
Venue
1997
10.1109/ICPP.1997.622652
ICPP
Keywords
Field
DocType
software protocol,sc-coma scale,performance price,hardware support,hardware versus software implementation,system sc-coma,software-controlled coma,performance gap,software emulation layer,idealized hardware coma,hardware counterpart,cost effectiveness,application software,coma,emulation,workstations,coherence,hardware,hybrid systems,engines,software performance,distributed shared memory,hybrid system,performance indicator,cache coherence,cache only memory architecture
Computer science,Cache-only memory architecture,Software performance testing,Software,Application software,Computer hardware,Memory architecture,Distributed computing,Parallel computing,Distributed shared memory,Operating system,Hardware architecture,Cache coherence
Conference
ISSN
ISBN
Citations 
0190-3918
0-8186-8108-X
6
PageRank 
References 
Authors
0.55
17
3
Name
Order
Citations
PageRank
Adrian Moga1193.10
Michel Dubois21303259.66
Alain Gefflaut317624.33