Title
The IBM Victor V256 partitionable multiprocessor
Abstract
Victor V256 is a partitionable message-passing multiprocessor with 256 processors, designed and in use at the IBM Thomas J. Watson Research Center. Our goals are to explore computer architectures based on the message-passing model and to use these architectures to solve real applications. We present the architecture of the Victor system, particularly its partitioning and nonintrusive monitoring. We discuss some of the programming environments on Victor, such as E-kernel, an embedding kernel developed for the support of program mapping and network reconfiguration. We review applications developed and run on Victor and discuss a few in depth, concluding with insights we have gained from this project.
Year
DOI
Venue
1991
10.1147/rd.355.0573
IBM Journal of Research and Development
Keywords
Field
DocType
ibm victor v256 partitionable,application development,message passing,computer architecture
IBM,Computer science,Multiprocessing,Operating system,Embedded system
Journal
Volume
Issue
ISSN
35
5-6
0018-8646
Citations 
PageRank 
References 
3
0.75
13
Authors
12
Name
Order
Citations
PageRank
D. G. Shea120232.13
W. W. Wilcke217416.85
R. C. Booth3111.70
D. H. Brown430.75
Z. D. Christidis530.75
M. E. Giampapa613813.95
G. B. Irwin730.75
T. T. Murakami830.75
V. K. Naik98014.68
F. T. Tong1030.75
P. R. Varker1115224.78
D. J. Zukowski1230.75