Paper Info
Title
Redundancy in number representations as an aspect of computational complexity of arithmetic functions
Abstract
Introduction Recent research has led to the derivation of bounds for the time required to perform arithmetic operations by means of logical elements with a limited number of inputs [1]–[4]. The model of a (d, r) logical circuit C employed in these studies consists of a set of (d, r) logical elements and a rule of interconnection with designated sets of input and output lines. The (d, r) logical element has r input lines and one output line; these lines can assume one of d distinct states. The (d, r) logical element has a unit time delay; that is, the state of the output line at the time t+1 is a function of the states of the input lines at time t.
Year
DOI
Venue
1975
10.1109/ARITH.1975.6156970
IEEE Symposium on Computer Arithmetic
Keywords
Field
DocType
encoding,ducts,arithmetic function,integrated circuit,computer model,redundancy,additives,computational modeling,computational complexity
Discrete mathematics,Arithmetic function,Theoretical computer science,Input/output,Redundancy (engineering),Interconnection,Mathematics,Encoding (memory),Computational complexity theory
Conference
Citations 
PageRank 
References 
0
0.34
0
Authors
1
Name
Order
Citations
PageRank
Algirdas Avizienis13116351.14