Paper Info
Title
RECN-IQ: A Cost-Effective Input-Queued Switch Architecture with Congestion Management
Abstract
As the number of computing and storage nodes keeps increasing, the interconnection network is becoming a key element of many computing and communication systems, where the overall performance directly depends on network performance. This performance may dramatically drop during congestion situations. Although congestion may be avoided by overdimensioning the network, the current trend is to reduce overall cost and power consumption by reducing the number of network components. Thus, the network will be prone to congestion, thereby becoming mandatory the use of congestion management techniques. In that sense, the technique known as Regional Explicit Congestion Notification (RECN) completely eliminates the Head-of-Line (HOL) blocking produced by congested packets, turning congestion harmless. However, RECN has been designed for switches with queues at input and output ports (CIOQ switches), thus it can not be directly applied to other types of switches. Additionally, the method RECN uses for detecting congestion requires several detection queues that increase the memory requirements and thus switch cost. Thus, we completely redefine the RECN mechanism in order to achieve different goals. First, we adapt RECN to a switch organization with queues only at input ports (IQ switches). These switches are simpler and cheaper to produce than CIOQ ones. Second, we propose a new method for detecting congestion that does not require several detection queues, thereby reducing RECN memory requirements. These improvements lead to achieve a cost-effective switch organization that derive maximum performance even in the presence of congestion. Also, we present in detail a realistic switch architecture supporting the new mechanism. Results demonstrate that the new RECN version in an IQ switch achieves maximum network performance in all the analyzed situations. These results have been obtained with a reduction factor of data memory requirements of 5 with respect to the previous RECN mechanism in CIOQ switches.
Year
DOI
Venue
2007
10.1109/ICPP.2007.71
ICPP
Keywords
Field
DocType
cost-effective input-queued switch architecture,recn memory requirement,congestion management,previous recn mechanism,interconnection network,maximum network performance,congestion situation,recn mechanism,detection queue,congestion management technique,new recn version,method recn,computer architecture,engineering management,network performance,communication system,computer networks,explicit congestion notification,head of line blocking,cost effectiveness,switches,queueing theory
Computer science,Queue,Parallel computing,Network packet,Computer network,Communications system,Input/output,Queueing theory,Head-of-line blocking,Explicit Congestion Notification,Distributed computing,Network performance
Conference
ISSN
ISBN
Citations 
1530-2016
0-7695-2933-X
12
PageRank 
References 
Authors
0.75
3
4
Name
Order
Citations
PageRank
G. Mora1153.42
Pedro J. Garcia21276.17
Jose Flich3684.49
Jose Duato489354.65