Name
Title | ||
|---|---|---|
A Stepwise Dimension Reduction Approach to Evolutionary Design of Relative Large Combinational Logic Circuits |
Abstract | ||
|---|---|---|
In this paper, a stepwise dimension reduction (SDR) approach to evolutionary design of relatively large combinational logic circuits is proposed. The proposed method divides the whole circuit into several layers. As for a circuit with one output, the number of input combinations is expected to be reduced layer-by-layer. The current layer's outputs are the next layer's inputs. All layers are evolved separately one after another, and assembled to form a final solution. The experimental results of SDR on parities, multipliers and circuits taken from MCNC library are comparable with those of GDD. Especially, the 19-parity circuit can be evolved successfully. |
Year | DOI | Venue |
|---|---|---|
2008 | 10.1007/978-3-540-85857-7_5 | ICES |
Keywords | Field | DocType |
stepwise dimension reduction approach,evolutionary design,next layer,large combinational logic circuits,final solution,19-parity circuit,current layer,whole circuit,large combinational logic circuit,mcnc library,dimension reduction,layer by layer | Sequential logic,Dimensionality reduction,Evolutionary algorithm,Aerospace engineering,Electronic engineering,Evolvable hardware,Combinational logic,Engineering,Electronic circuit,Computer engineering | Conference |
Volume | ISSN | Citations |
5216 | 0302-9743 | 3 |
PageRank | References | Authors |
0.43 | 17 | 3 |
Name | Order | Citations | PageRank |
|---|---|---|---|
| Zhifang Li | 1 | 15 | 2.45 |
| Wenjian Luo | 2 | 356 | 40.95 |
| Xufa Wang | 3 | 608 | 39.62 |