Title | ||
---|---|---|
At-speed I/O Test for Fast Vref Optimization in High Speed Single-ended Memory Systems |
Abstract | ||
---|---|---|
Single-ended memory interfaces have gone through a remarkable increase in data rates over the last decade increasing the challenges faced by system designers and OEMs. One of the major challenges in single-ended system design is optimizing the reference voltage level (Vref) in the receiver. The traditional method to choose Vref is to sweep the reference voltage level while performing a link Bit Error Rate (BER) test. This existing method has serious disadvantages like additional circuitry, system overhead and a very long time to completion. In this paper, a fast technique to obtain optimum value of Vref is proposed. It uses a simple density test at the receiver to perform the operation. This technique has been demonstrated in a POD (Pseudo Open-Drain) signaling based single-ended transceiver designed in TSMC 40nm process. System level measurements in the lab at 6 Gb/s data rate prove that this technique is as accurate as the traditional technique in choosing Vref while being several thousand times faster |
Year | DOI | Venue |
---|---|---|
2013 | 10.1109/VLSID.2013.204 | VLSI Design |
Keywords | Field | DocType |
fast technique,reference voltage level,existing method,single-ended system design,fast vref optimization,simple density test,o test,data rate,system overhead,system level measurement,single-ended memory,traditional technique,system designer | Transceiver,Computer science,Voltage reference,Systems design,Real-time computing,Input/output,Electronic engineering,Computer hardware,Memory systems,Memory architecture,Bit error rate,System level | Conference |
ISSN | Citations | PageRank |
1063-9667 | 0 | 0.34 |
References | Authors | |
2 | 4 |
Name | Order | Citations | PageRank |
---|---|---|---|
Sanku Mukherjee | 1 | 19 | 3.98 |
Srinivasaraman Chandrasekaran | 2 | 0 | 0.68 |
Ganapathy Subramanyan E.K. | 3 | 0 | 0.34 |
Arul Sendhil | 4 | 19 | 4.31 |