Abstract | ||
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This paper addresses the problem of test generation from partially specified deterministic Finite State Machines (FSMs) that may have indistinguishable states and, thus, are not necessarily reduced (minimized). The known methods for checking experiments that are based on state identification are not applicable to unreduced machines. We propose the so-called State-Counting approach that is directly applicable to unreduced FSMs. The approach generalizes the idea of state identification in test generation methods for deterministic machines. |
Year | DOI | Venue |
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2005 | 10.1109/TC.2005.152 | IEEE Trans. Computers |
Keywords | Field | DocType |
test generation method,partial deterministic fsm specifications,deterministic finite state machines,state identification,unreduced fsms,indistinguishable state,unreduced machine,test generation,known method,deterministic machine,so-called state-counting approach,finite state machine,indexing terms,conformance testing,fault detection,finite state machines,formal specification,formal verification | Computer science,Fault detection and isolation,Parallel computing,Algorithm,Formal specification,Finite-state machine,Theoretical computer science,Program testing,Formal verification | Journal |
Volume | Issue | ISSN |
54 | 9 | 0018-9340 |
Citations | PageRank | References |
72 | 2.05 | 26 |
Authors | ||
2 |
Name | Order | Citations | PageRank |
---|---|---|---|
A. Petrenko | 1 | 565 | 31.37 |
Nina Yevtushenko | 2 | 664 | 63.45 |