Title
Glitch and Laser Fault Attacks onto a Secure AES Implementation on a SRAM-Based FPGA
Abstract
Programmable devices are an interesting alternative when implementing embedded systems on a low-volume scale. In particular, the affordability and the versatility of SRAM-based FPGAs make them attractive with respect to ASIC implementations. FPGAs have thus been used extensively and successfully in many fields, such as implementing cryptographic accelerators. Hardware implementations, however, must be protected against malicious attacks, e.g. those based on fault injections. Protections have been usually evaluated on ASICs, but FPGAs can be vulnerable as well. This work presents thus fault injection attacks against a secured AES architecture implemented on a SRAM-based FPGA. The errors are injected during the computation by means of voltage glitches and laser attacks. To our knowledge, this is one of the first works dealing with dynamic laser fault injections. We show that fault attacks on SRAM-based FPGAs may behave differently with respect to attacks against ASIC, and they need therefore to be addressed by specific countermeasures, that are also discussed in this paper. In addition, we discuss the different effects obtained by the two types of attacks.
Year
DOI
Venue
2011
10.1007/s00145-010-9083-9
J. Cryptology
Keywords
Field
DocType
AES,SRAM-based FPGA,Power glitch,Laser fault injections,DDR
Glitch,Cryptography,Field-programmable gate array,Implementation,Static random-access memory,Application-specific integrated circuit,AES implementations,Fault injection,Mathematics,Embedded system
Journal
Volume
Issue
ISSN
24
2
0933-2790
Citations 
PageRank 
References 
23
0.92
16
Authors
6
Name
Order
Citations
PageRank
G. Canivet1230.92
P. Maistri220011.98
regis leveugle337032.01
Jessy Clédière41299.31
F. Valette5230.92
marc renaudin616524.14