Name
Abstract | ||
|---|---|---|
In this work an efficient model for parallel computing, called Shuffled Mesh (SM), is introduced. This bounded degree model has the mesh as subgraph and it is based on the union of mesh and shuffle exchange topologies. It is shown that an N processor SM combines the features of mesh, shuffle exchange, hypercubic networks, mesh of trees and hypercube, and is able to support all the algorithms designed for such topologies with constant or logarithmic time performance degradation. Finally, it is proved that the VLSI layout of a SM is the same as of a shuffle exchange of the same size. |
Year | DOI | Venue |
|---|---|---|
2000 | 10.1023/A:1019119401309 | Telecommunications Systems |
Keywords | Field | DocType |
Parallel Computing,Annual IEEE Symposium,12th Annual IEEE Symposium,Canonic Order,Hypercubic Network | Computer science,Parallel computing,Order One Network Protocol,Network topology,Logarithm,Vlsi layout,Hypercube,Bounded function | Journal |
Volume | Issue | ISSN |
13 | 1 | 1572-9451 |
Citations | PageRank | References |
0 | 0.34 | 7 |
Authors | ||
4 | ||
Name | Order | Citations | PageRank |
|---|---|---|---|
| G. Bongiovanni | 1 | 0 | 0.34 |
| Giuseppe A. De Biase | 2 | 1 | 1.40 |
| Annalisa Massini | 3 | 137 | 15.53 |
| A. Monti | 4 | 0 | 0.34 |