Name
Abstract | ||
|---|---|---|
Multi-processor system on chip (MPSoC) has been widely applied in embedded systems design. However, it has posed great challenges in designing and implementing prototype chip for diverse applications due to different instruction set architectures (ISA), programming interfaces and software tool chains. In order to solve the problem, we introduce SOA into MPSoC design, because it can provide flexibility and extensibility for MPSoC chip design at lower cost through adopting re-usable, self-contained modules in the design process. In this paper, we propose a service-oriented multi-processor SOMP, which integrates embedded processors and hardware IP cores as computing servants on a single chip. SOMP provides unified programming interfaces for users through utilizing diverse computing resources. In order to demonstrate the performance of SOMP, we implemented it on a Digilent Virtex5LX110T FPGA board and designed several sample test applications for verification purpose. The experimental results show that SOMP can improve the parallelism greatly and achieve 95.7% of the theoretical speedup on average. |
Year | DOI | Venue |
|---|---|---|
2011 | 10.1109/SCC.2011.26 | IEEE SCC |
Keywords | Field | DocType |
run-time scheduling,mpsoc chip design,embedded system design,diverse application,embedded processor,instruction set architecture,multiprocessor system-on-chip,soa,hardware ip cores,diverse computing resource,service-oriented multiprocessor,software tools,digilent virtex5lx110t fpga board,mpsoc design,prototype chip,design process,system-on-chip,multiprocessing systems,service-oriented architecture,programming interface,logic design,somp,single chip,software tool chain,run-time reconfiguration,embedded systems design,instruction sets,multi processor system on chip,embedded systems,field programmable gate arrays,service-oriented multi processors,self-contained module,service-oriented,scheduling,hardware,computer architecture,system on chip,service oriented architecture | Computer architecture,System on a chip,Instruction set,Computer science,Field-programmable gate array,Integrated circuit design,Engineering design process,MPSoC,Service-oriented architecture,Speedup | Conference |
ISBN | Citations | PageRank |
978-0-7695-4462-5 | 18 | 1.05 |
References | Authors | |
11 | 5 | |
Name | Order | Citations | PageRank |
|---|---|---|---|
| Chao Wang | 1 | 35 | 2.86 |
| Junneng Zhang | 2 | 97 | 8.85 |
| Xuehai Zhou | 3 | 551 | 77.54 |
| Xiaojing Feng | 4 | 62 | 5.69 |
| Xiaoning Nie | 5 | 44 | 6.94 |