Paper Info
Title
Dynamic algorithm transformations (DAT)—a systematic approach to low-power reconfigurable signal processing
Abstract
In this paper, dynamic algorithm transformations (DATs) for designing low-power reconfigurable signal-processing systems are presented. These transformations minimize energy dissipation while maintaining a specified level of mean squared error or signal-to-noise ratio. This is achieved by modeling the nonstationarities in the input as temporal/spatial transitions between states in the input state-space. The reconfigurable hardware fabric is characterized by its configuration state-space. The configurable parameters are taken to be the filter taps, coefficient and data precisions, and supply voltage V/sub dd/. An energy-optimal reconfiguration strategy is derived as a mapping from the input to the configuration state-space. In this strategy, taps are powered down starting with the tap with the smallest value [w/sub k//sup 2///spl Sigma//sub m/(w/sub k/)] (where w/sub k/ and /spl Sigma//sub m/(w/sub k/) are, respectively, the adders, redundant-to-binary conversion, tree adders, coefficient and energy dissipation of the kth tap). Optimal values for precision and supply voltage V/sub dd/ are subsequently computed from the roundoff error and critical path delay requirements, respectively. The DAT-based adaptive filter is employed as a near-end crosstalk (NEXT) canceller in a 155.52-Mb/s asynchronous transfer mode-local area network transceiver over category-3 wiring. Simulation results indicate that the energy savings range from -2% to 87% as the cable length varies from 110 to 40 m, respectively, with an average saving of 69%. An average saving of 62% is achieved for the case where the supply voltage V/sub dd/ is kept fixed.
Year
DOI
Venue
1999
10.1109/92.805753
IEEE Trans. VLSI Syst.
Keywords
Field
DocType
systematic approach,spl sigma,sub k,configuration state-space,energy saving,average saving,index terms— algorithm transformations,sub m,recon- figurable computing,sub dd,signal processing.,energy dissipation,low-power reconfigurable signal processing,input state-space,voltage v,dynamic algorithm transformation,low-power,indexing terms,voltage,adders,low power electronics,signal processing,adaptive filters,algorithm design and analysis,roundoff error,crosstalk,adaptive filter,asynchronous transfer mode,mean square error,critical path,mean squared error,signal to noise ratio,state space,local area network,energy optimization,reconfigurable computing,hardware
Signal processing,Adder,Round-off error,Computer science,Dissipation,Signal-to-noise ratio,Mean squared error,Electronic engineering,Real-time computing,Adaptive filter,Low-power electronics
Journal
Volume
Issue
ISSN
7
4
1063-8210
Citations 
PageRank 
References 
12
1.28
25
Authors
2
Name
Order
Citations
PageRank
M. Goel123127.01
Naresh R. Shanbhag22027205.25