Name
Abstract | ||
|---|---|---|
We designed an asynchronous multi-bit one-time-programmable (OTP) memory which is useful for micro control units (MCUs) of general mobile devices, automobile appliances, power ICs, displays ICs, and CMOS image sensors. A conventional OTP cell consists of an access transistor, a NMOS capacitor as antifuse, and a gate-grounded NMOS diode for electrostatic discharge (ESD) protection to store a single bit per cell. On the contrary, a newly proposed OTP cell consists of a PMOS program transistor, a NMOS read transistor, n NMOS capacitors as antifuses, and it NMOS switches selecting antifuse to store n bits per cell. We used logic supply voltage VDD (=1.5 V) and an external program voltage VPPE (=8.5 V). Also, we simplified the sens amplifier circuit by using the sense amplifier of clocked inverter type [3] instead of the conventional current sens amplifier [2]. The asynchronous multi-bit OTP of 128 bytes is designed with Magnachip 0.13 mu m CMOS process. The layout area is 229.52 x 495.78 mu m(2). |
Year | DOI | Venue |
|---|---|---|
2009 | 10.1587/transele.E92.C.173 | IEICE TRANSACTIONS ON ELECTRONICS |
Keywords | DocType | Volume |
multi-bit OTP, two-transistor OTP cell, antifuse, sense amplifier | Journal | E92C |
Issue | ISSN | Citations |
1 | 0916-8524 | 0 |
PageRank | References | Authors |
0.34 | 2 | 8 |
Name | Order | Citations | PageRank |
|---|---|---|---|
| Chul-Ho Choi | 1 | 11 | 1.69 |
| Jaehyung Lee | 2 | 136 | 16.13 |
| Tae-Hoon Kim | 3 | 459 | 53.02 |
| Oe-yong Shim | 4 | 0 | 0.34 |
| Yoon-geum Hwang | 5 | 0 | 0.34 |
| Kwangseon Ahn | 6 | 18 | 4.16 |
| Pan-Bong Ha | 7 | 8 | 3.09 |
| Young-hee Kim | 8 | 2 | 1.19 |