Name
Title | ||
|---|---|---|
On-Chip Evaluation, Compensation, and Storage of Scan Diagnosis Data - A Test Time Efficient Scan Diagnosis Architecture |
Abstract | ||
|---|---|---|
Most scan based designs implement the scan enable as a slow speed global control signal, and can therefore only implement launch-on-capture (LOC) delay tests. Launch-onshift (LOS) tests are generally more effective, achieving higher fault coverage with ... |
Year | DOI | Venue |
|---|---|---|
2006 | 10.1109/ETS.2006.34 | European Test Symposium |
Keywords | Field | DocType |
global control signal,delay test,higher fault coverage,on-chip evaluation,scan diagnosis data,diagnosis architecture,slow speed,test time efficient scan,failure analysis,compaction,chip,production systems,system testing,system on chip | Boundary scan,Architecture,System on a chip,Logic testing,Computer science,Scan chain,Electronic engineering,Real-time computing,Test compression,Boundary scan testing,Embedded system | Conference |
ISSN | ISBN | Citations |
1530-1877 | 0-7695-2566-0 | 6 |
PageRank | References | Authors |
0.46 | 11 | 6 |
Name | Order | Citations | PageRank |
|---|---|---|---|
| Frank Poehl | 1 | 34 | 2.19 |
| Jan Rzeha | 2 | 6 | 0.46 |
| Matthias Beck | 3 | 34 | 2.19 |
| Michael Goessel | 4 | 108 | 7.94 |
| Ralf Arnold | 5 | 6 | 0.46 |
| Peter Ossimitz | 6 | 6 | 0.46 |