Abstract | ||
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We describe in this work a Core Generator for Pattern Recognition tasks. This tool is able to generate, according to user requirements, the hardware description of a digital architecture, which implements a Support Vector Machine, one of the current state-of-the-art algorithms for Pattern Recognition. The output of the Core Generator consists of a high-level language hardware core description, suitable to be mapped on a reconfigurable device, like a Field Programmable Gate Array (FPGA). As an example of the use of our tool, we compare different solutions, by targeting several reconfigurable devices, and implement the recognition part of a machine vision system for automotive applications. |
Year | DOI | Venue |
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2011 | 10.1142/S0218126611007244 | JOURNAL OF CIRCUITS SYSTEMS AND COMPUTERS |
Keywords | Field | DocType |
Core generator,pattern recognition,machine learning,Support Vector Machine,field programmable gate array | Machine vision system,Computer science,Support vector machine,Field-programmable gate array,Computer hardware,Digital architecture,User requirements document,Automotive industry,Embedded system | Journal |
Volume | Issue | ISSN |
20 | 2 | 0218-1266 |
Citations | PageRank | References |
14 | 0.74 | 21 |
Authors | ||
4 |
Name | Order | Citations | PageRank |
---|---|---|---|
Davide Anguita | 1 | 1001 | 70.58 |
Luca Carlino | 2 | 14 | 0.74 |
Alessandro Ghio | 3 | 667 | 35.71 |
Sandro Ridella | 4 | 677 | 140.62 |