Name
Title | ||
|---|---|---|
Random Switching Logic: A New Countermeasure against DPA and Second-Order DPA at the Logic Level |
Abstract | ||
|---|---|---|
This paper proposes a new countermeasure, Random Switching Logic (RSL), against DPA (Differential Power Analysis) and Second-Order DPA at the logic level. RSL makes a signal transition uniform at each gate and suppresses the propagation of glitch to allow power consumption to be independent of predictable data. Furthermore, we implement basic logic circuits on the FPGA (Field Programmable Gate Array) by using RSL, and evaluate the effectiveness. As a result, we confirm the fact that the secure circuit can be structured against DPA and Second-Order DPA. |
Year | DOI | Venue |
|---|---|---|
2007 | 10.1093/ietfec/e90-a.1.160 | IEICE Transactions |
Keywords | Field | DocType |
new countermeasure,logic level,second-order dpa,secure circuit,predictable data,random switching logic,power consumption,differential power analysis,field programmable gate array,basic logic circuit,second order,side channel attacks | Glitch,Power analysis,Logic gate,Signal transition,Field-programmable gate array,Theoretical computer science,Electronic engineering,Side channel attack,Logic level,Logic family,Mathematics,Embedded system | Journal |
Volume | Issue | ISSN |
E90-A | 1 | 0916-8508 |
Citations | PageRank | References |
39 | 2.39 | 0 |
Authors | ||
3 | ||
Name | Order | Citations | PageRank |
|---|---|---|---|
| Daisuke Suzuki | 1 | 306 | 21.80 |
| Minoru Saeki | 2 | 243 | 14.88 |
| Tetsuya Ichikawa | 3 | 346 | 30.90 |