Title
10gbit/S 2mw Inductorless Transimpedance Amplifier
Abstract
This work presents the design and performance of a 10Gbit/s transimpedance amplifier (TIA) implemented in a 40nm CMOS technology. The introduced TIA uses an inverter with active common-drain feedback (ICDF-TIA). The TIA is followed by a two-stage differential amplifier and a 50 Omega differential output driver to provide an interface to the measurement setup. The optical receiver shows an optical sensitivity of -19dBm for a BER = 10(-12). The transimpedance amplifier achieves a transimpedance gain of 47dB Omega, 8GHz bandwidth with 0.45pF total input capacitance for the photodiode, ESD protection and input PAD. The TIA occupies 0.0002mm(2) whereas the complete optical receiver occupies a chip area of 0.16mm(2). The power consumption of the TIA is only 2mW and the complete chip dissipates 16mW for a 1.1V single supply voltage. The complete optical receiver has a 58dB Omega transimpedance gain and 7GHz bandwidth.
Year
DOI
Venue
2012
10.1109/ISCAS.2012.6271595
2012 IEEE INTERNATIONAL SYMPOSIUM ON CIRCUITS AND SYSTEMS (ISCAS 2012)
Keywords
Field
DocType
impedance,bandwidth,cmos integrated circuits,noise
Inverter,Fully differential amplifier,Computer science,CMOS,Chip,Electronic engineering,Transimpedance amplifier,Bandwidth (signal processing),Electrical engineering,Photodiode,Differential amplifier
Conference
ISSN
Citations 
PageRank 
0271-4302
3
0.48
References 
Authors
6
2
Name
Order
Citations
PageRank
Atef Mohamed1606.50
H. Zimmermann25715.95